In this post I’ll describe a few notable projects I created during my time at UC Berkeley. I made the mistake of not saving a lot of these, so some of these will just be descriptions. Here they are in reverse chronological order:
EECS 150 project: Simple computer system on an FPGA
We were tasked with implementing a 32-bit CPU with a three-stage pipeline implementing a subset of the MIPS instruction set (floating point and multiply/divide were left out, as well as some branch instructions and signed addition). We also implemented a UART, the memory-facing side of the video interface, and a simple GPU that can draw lines and fill the frame with a solid color. For bonus points we added the ability to draw filled rectangles.
All of the Verilog code, plus the C test code is available here: https://github.com/rfmerrill/eecs150
Unfortunately I did not capture the demonstration code on video and I no longer have access to the (very expensive) ML505 demo boards.
EE 122 class projects: Networking stuff in simulated and real environments.
I didn’t keep any of the code for this class unfortunately, but the projects were all fairly straightforward.
The assignment PDFs and skeleton code tarballs for the three projects can be found here.
Project 1 had us implement reliable transport on top of UDP.
Project 2 had us modify the behavior of a hub in a network simulator to simulate switches and RIP-supporting routers.
Project 3 gave us a small Linux machine (TonidoPlug) with two network interfaces and had us implement a firewall that blocks connections based on port, on HTTP domain (using packet inspection) and do simple logging of traffic.
All three projects were in Python–the libraries provided by the instructors abstracted away most of the nastiness for us, so the projects were fairly straightforward.
EE40 class project: Crude oscilloscope EEG.
This was my first time doing a PCB layout so it was quite exciting. Our challenge–through which they held our hands quite a bit–was to build a circuit that amplified and filtered the signal coming from three electrodes (one on each side of the head and one on the right leg) to produce some sort of meaningful waveform that could be viewed on a scope.
The design is fairly simple: The two head electrodes go into the two inputs of an instrumentation amplifier, while the third electrode is used in a driven right leg circuit to cancel common-mode interference. The output of that goes into an active lowpass filter which also amplifies it, and then finally into two cascaded notch filters (RLC filters with an inductance gyrator in place of the inductor) to remove all traces of 60Hz noise.
Other (earlier) classes:
CS 61C–Cache simulator in C, simulated 8-bit CPU in Logisim
CS 61A–LOGO interpreter written in Scheme.